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Stale Speed Trip
In MARK VIe, there is a protective trip called stale speed which will be activated by PPRO through TREG board for cutting 20FL1 - ve voltage? What does it will monitor exactly for activation of this trip?
By Chiranjeevi on 5 May, 2017 - 10:23 am

In MARK VIe, there is a protective trip called stale speed.

It is stated in manual that it will monitor the main speed pickups instead of overspeed pickups connected to it's terminal board TRPO.
It also states that if the speed pick up value was not changing for consecutive 100 frame periods, the corresponding IO pack of PPRO will deenergize it's own emergency trip relay?

what is the criticality of this trip? and why PPRO will monitor the speed of main speed pick ups (77NH-1, 2, 3) instead of its own over speed pick ups (77NH-4,5,6)?

Can anybody explain?


Have you searched GEH-6721, Vol. II, or Vol. III for information on the alarm?

If so, what did you discover?

By Chiraneevi on 7 May, 2017 - 8:25 am


The following info was there in VOL II.

"The PPRO provides an additional main control watchdog function that is based on a live speed signal. The protection works as follows: If PPRO PulseRate1 is determined to be zero speed the protection is turned off. If above zero speed, the pack looks at the value of Speed1 from the main control. If the most recent Speed1 value exactly matches the Speed1 value from the last data frame then a counter is incremented. If the counter reaches a threshold then a stale speed trip is declared and latched."

But my doubt is why it monitors main speed pick ups instead of its own. and how it PPRO was connected to PTUR to monitor main speed pick up values? does it get the value from Ethernet cable through controllers? or was there any cable between these two boards?

Doubt. Not a good word, but sometimes necessary and should make you feel good if you successfully challenge what, at first glance or read, can sometimes seem in error.

The PPRO's main speed pickups are the overspeed signals connected to the PPRO. But <Q> and <P> do also know what each other sense as critical signals. The IONET connects the <P> core because all the control and protective processors know what the other control and protection processors are using for critical signals.

So, if the actual feedback doesn't change for some predetermined amount of time the stale speed signal logic is actuated to protect the unit.

Hope this helps!