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I have an application with 80 analog inputs, and for each input I have a table of 8 limits. These limits define Signal Fail Low, Signal Fail Hi, Lo, LoLo, Hi, HiHi, Event Low, and Event Hi. The event limits are to be primarily for process control, while the others are to be used primarily to set alarms / shutdowns.
Example, AI0001 value 35.
Limits table -10, 110, 40, 20, 70, 90, 50, 55
Outputs AI01L1B, AI01L2B, AI01L3B, AI01L4B, AI01L5B, AI01L6B, AI01L7B, AI01L8B.
In this case, I would want 1B and 4B BOOL to be SET or On, because those limits are lower than the current value, while all the others would be RESET or Off.
Finally I would like it to be latched until both the condition has changed AND a reset signal is given.
I need to scan all 80 analog inputs and compare them to all 640 limits every scan.
Does anyone have a LD sample of this for a GE Fanuc 90-30 system with a -364 CPU? Would this be faster as an IL block? I don't have a C compiler, and I don't know IL well enough. Just not sure of how to start with Address A, and add 8 to it every loop to get the next 8 addresses, as well as adding to the addresses of the bits I am setting.
Example, AI0001 value 35.
Limits table -10, 110, 40, 20, 70, 90, 50, 55
Outputs AI01L1B, AI01L2B, AI01L3B, AI01L4B, AI01L5B, AI01L6B, AI01L7B, AI01L8B.
In this case, I would want 1B and 4B BOOL to be SET or On, because those limits are lower than the current value, while all the others would be RESET or Off.
Finally I would like it to be latched until both the condition has changed AND a reset signal is given.
I need to scan all 80 analog inputs and compare them to all 640 limits every scan.
Does anyone have a LD sample of this for a GE Fanuc 90-30 system with a -364 CPU? Would this be faster as an IL block? I don't have a C compiler, and I don't know IL well enough. Just not sure of how to start with Address A, and add 8 to it every loop to get the next 8 addresses, as well as adding to the addresses of the bits I am setting.
