MK5 Dignostic Alarm

I

Thread Starter

inhwang2

I got some diagnostic alarms as follows:

1. SFL1 Core Voter Mismatch

2. TCD1 Relays dropped due to IONET failure

Let me know how to solve that problems. Also, I would like to know the reason why that alarms occurs.

Please contact me at [email protected]
 
Hello,

>1. SFL1 Core Voter Mismatch

SFL1, System Frequency Line 1 is a signal related to the frequency of the running (bus; grid) voltage. For some reason one or more of the processors of the Mark V doesn't sense the same line frequency as the others. Reasons can include poor ribbon cable connections between terminal boards and printed circuit cards in the Mark V, weak input signal to the Mark V, etc.

>2. TCD1 Relays dropped due to IONET failure

TCD1 refers to the first TCDA in the IONET "string" from the affected processor (<C>, or <R>, or <S> or <T>). And, the IONET is the serial communications network which connects the TCDA to the affected processor. So, something which causes the IONET to fail or be intermittent will result in the relays associated with the first TCDA card in the IONET to be de-energized.

The IONET can be visualized by looking at the Mark V Maintenance Manual, GEH-5980. It runs from a control processor (<R>, <S> and <T>)
to the associated TCEA card in <P>, then to the associated TCDA card in <QD1>, and if so equipped, to the associated TCDA in <QD2>. For <C>, the TCDA runs directly to the TCDA card in Loc. 1 of <CD> (there can be only one TCDA for <C>).

The PT inputs from the running (bus; grid) PTs are connected to the <P> core, and make their way into the CDB (Control Signal Database) by way of the IONET. So, my best guess, based on the information provided, is that there is something amiss with the IONET cabling between the affected processor. And, I would also suggest that corrosion of the pins/cable connectors could be the cause of the problem.

Please write back to let us know what the problem was found to be.
 
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