Mark V, C-cores stays at A6

@vscontrol,

GREAT NEWS!

You answered most of our questions, and provided good photos. It makes replying easier and leads to better results.

Again—great news AND thank you very much for the feedback (letting us know how you were able to solve the problem with our support) AND thank you for the kind words. We are all grateful for Control.com—but, really, it’s the feedback from users like yourself that lets others know how you were able to solve the problem. That’s not common on many World Wide Web forums, and it’s what differentiates Control.com from most other forums. It’s the primary reason I contribute to Control.com—the feedback!

Tchau!
 
I want to address the issues of making changes to <CD> or <QD1> or <QD2> (if present) I/O Configuration (inversion masks and/or change detects). After making the desired changes to the TCDA I/O Configuration(s) it is necessary to download to <C> or <D> or <R> or <S> or <T>. The download goes to the U9 EEPROM chip on the DCC/SDCC card. For changes to TCDA I/Oo Configuration to become effective (for <CD>, <QD1> or <QD2> if present) it is necessary to perform a HARD REBOOT of the control processor (<C>, <QD1 or <QD2> if present). This is because the only way for the TCDA to receive the changes to its RAM is to remove the power from the control processor, which removes the power from the TCDA, and then re-apply power to the control processor which makes the TCDA card go to the DCC/SDCC EEPROM to get the I/O Configuration and download it to its RAM.

If one only does a soft reboot (using the little white button on the DCC/SDCC) that DOES NOT remove the power from the TCDA and so it will never go to the DCC/SDCC EEPROM to get the new I/O Configuration. Even if the processor (<C>, <R>, <S> or <T>) goes to A7 after the reboot the I/O Configuration changes which should have gone down to the TCDA didn't go to the TCDA because power was never removed from the TCDA.

Lastly, as was discovered during the troubleshooting of the problem in this thread there are times when a processor IS NOT at A7 and a EEPROM download is performed and magically the processor will jump to A7. That's what I call a "false A7"--because the processor was never rebooted to get the changes from the EEPROM to the RAM of the various cards associated with the processor--and ALL of a processor's complement of cards (the cards associated with a particular processor) ARE NOT physically located in the processor. For example, the TCDA card of <C> is located in Loc. 1 of <CD>. The TCDA in Loc. 1 of <CD> receives it power from the TCPS in Loc. 5 of <C>but IS NOT affected by the little white button on the DCC/SDCC card.

As an aside, a similar thing also goes for I/O Configuration changes to the TCEA card. They get downloaded to the U9 EEPROM on the DCC/SDCC card of <R>, <S>, and/or <T> but the changes won't actually be transferred from the U9 EEPROM ship to the TCEA RAM until the TCEA is rebooted from the switch/connector in the <PD> core.

It's my very strong recommendation to ALWAYS reboot a processor by removing the power to the processor, waiting 15-30 seconds and then re-applying power (usually from <PD>). The little white "reset" button on the DCC/SDCC card only resets (re-initializes) the DCC/SDCC card and the LCC/SLCC card. So, if I/O Configuration changes to other cards associated with a particular processor are downloaded the best way to ensure those changes get to the card that requires them is to do a hard reboot of the processor by cycling its power supply. If any I/O Configuration changes are being downloaded to the protective processors (the TCEA cards in <PD>) one needs to do a hard reboot of the TCEA card(s) to make them go to the U9 EEPROM chip on the processor's DCC/SDCC card and download them to the TCEA card(s).

Isn't the Mark* V fun?!?!? (CSA used to ask that occasionally, and it always made me chuckle.)
 
Good work. One thing to keep in mind in the future when swapping cards around, particularly in <Q> (<R> <S> and <T>), is totalized data and controls constants. You'll notice the checksum for the TOTD sector in <C> and <D> is 0000. That's because TOTD is held in <Q>. If you go swapping cards around willy nilly in <Q> without knowing what you are doing you run the risk of blowing away all of your timers and counters. You also run the risk of blowing away constants, such as a recent combustion tune if the tuner didn't know how to reconcile constants in EEPROM, RAM, .AP1, and CONST_Q.SRC. Personally, I like to grab a screenshot of the timers and counters before doing any work in the Mk V. I then do a constants check with CONSTCHK T3 (Unit 3 in this example), and reconcile any differences. Finally I do an EEPROM UP T3 R TOTD (if R is a known good core, but can be done from S or T). Then I get to work in the panel.
 
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