GE Mark V Integrated Time Constant (ITC) First Order Lag

Under the GE Mark V ITC First Order Lag function block, more specifically used under FSRNV3 - Speed Control FSR, under RESET: OUT=V, they use what appears to be a Pulse labeled "INIT" to trigger the ITC Reset to make OUT = to the Input (FSR).

Has anyone come across what enables "INIT"? My guess would be that it is short for "initialize" and is only used when a controller comes online and boots to A7. For example, in a TMR system, if <S> faults and has to be restarted, after it comes back online, it would pass the current value of FSR without the LAG to reduce any disturbances/voting between the cores.

If anyone has any GE "tribal Knowledge" and could share, that would be great!
 
Top