Mark V LCC Display - "DCC Unready"

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Thread Starter

Benjamin Pineda

We are relocating two Frame 6B unit. When the Mark V processor were power up it only show DCC unready on R, S & T processor. I had install DCCA card of other core on R core but all of them give a DCC unready. Does it means all the DCCA cards are bad or the EEPROM corrupted.
 
Benjamin Pineda,

This is a new error message for me.

Does it come after the processors try to boot up, and then stop, displaying this message periodically?

"Unready" seems to mean "I have no OS (operating system),", or, "I can't find any information to load." The latter might be that the EEPROM are "empty" or corrupt, but that is non-volatile RAM and one would not think it would "go bad" or be "lost."

How long have the panels been powered-down/in storage?

Was the temperature/humidity properly maintained during storage, transportation, and installation at the new site?

Have you checked all the fuses on the TCPS cards?

Is the Mark V panel firmly connected to the new site's ground grid using a ground conductor of suitable size connected to the ground lug in the bottom of the Mark V panel, and the other end of the ground conductor bonded firmly to the site ground grid?

Is there any field wiring connected to the panel(s)? If so, before applying 125 VDC to the panels was the wiring checked for and cleared of any grounds (specifically the discrete (contact) input and solenoid output wiring)?

You need to concentrate on getting <C> to A6, and then once any one of <R>, <S> or <T> gets to A7, then <C> will go to A7.

Can you use the LCC keypad/display to check to see if <C> knows it's <C> (Voter ID set correctly), and if it has the proper StageLink ID so that an operator interface could download to EEPROM?

Do you have an operator interface connected to the StageLink connector and ready to communicate with <C>?

What is the 125 VDC power input voltage? Is it free of grounds?

At this point, about the only thing I could suggest would be to have a read of the TIMN section of the Mark V Maintenance Manual, GEH-5980, and set about connecting a a PC running serial communications software using a serial cable as per the manual and configured as per the manual, and then applying power to <C> and observing the messages on the PC monitor to see if you can gain some insight as to what might be happening or missing.

Again, <C> has to get to A6 (ready to enable its outputs), and then one of <R>, <S> or <T> has to get to A7 before <C> will then go to A7. But, you need to get <C> to A4/A5 to be able to download to it (if I recall correctly). And, it has to have the Voter ID set to <C>, and it has to have the proper StageLink ID (or rather, the StageLink ID in F:\CONFIG.DAT and the <C> StageLink ID have to be the same).

Please write back to let us know how you fare.
 
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Benjamin Pineda

Hi,

Initially, I had <R> & <S> core communicating with <C> core. I am in
the process of rectifying the problem on <T> core which has "INIT" on
the LCC display.

I had removed the DCCA card on <S> core and installed on <T> core
using the EEPROM of <T> core. But this give the DCC Unready on the LCC
display. I had removed the <R> core DCCA card and used on <T> core but
same DCC unready result.

When I installed back DCCA on <R> core to the original position has
give now the DCC unready result. I had tried to swap <S> & <T> core
DCCA card to <R> core but give same result now of DCC unready. Had
changed as well LCCB, TCQA & TCQC but did not give fruitful result.

I have checked the TCPS fuses and the voltages on the test points and
were in good voltage output.

Had tried to removed power ont the <QD1> & <CD> terminal boards to
eliminate possible effect of grounding but has no effect on the
problem though the voltage had +70 & -50 VDC.

The <C> core is booting up to to the level of A5 status.

The LCC keypad is inoperative when I tried to check the card status.
Had tried the TIMN but was not able to communicate/connect to the
processor.
 
Benjamin Pineda,

I'm more than a little confused.

Anyway, at this point, I can only guess the problem is most likely a problem with the ribbon cable which connects the LCC and DCC and TCQA (and TCQB, if so equipped). If the LCC keypad is inoperative, that would be my best guess. That or the insertion of the LCC onto the DCC is suspect.

It's generally not necessary to swap EEPROM chips when swapping cards. It would technically only be necessary to change Voter IDs if you didn't change the EEPROM chips. (I'm referring to the single unlabeled, socketed chip; I believe it's in Location U9 on the DCC. If you are swapping cards between <R>, <S>, and <T> it's not necessary to change the socketed chips with the printed labels. This is the source of most of my confusion at this point.)

I also wonder if the pins and sockets of all the ribbon cables (and the LCC/DCC connector) on these panels have ever had conductive grease applied, or if it has been re-applied recently. Sometimes, just removing and re-inserting cables into their connectors on the cards several times is enough to scratch any corrosion, but sometimes it's also necessary to use a thin film of conductive grease while also removing and re-inserting the cables several times to get them to work optimally--especially if corrosion is present.

Hope this helps!

If you don't have spares swapping cards can sometimes cause more problems than just trying to solve the problem without swapping cards (by damaging multiple cards when swapping them into a processor with unknown problems). If you can get <C> and two of <R>, <S> and <T> at A7 you could begin loop-checks of most I/O until you could get spare cards to try exchanging for troubleshooting.
 
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